Japanese Laid-Open Patent Publication Nos. 2007-258541 and 2011-216740 describe examples of wiring substrates that incorporate electronic components such as chip capacitors. A wiring substrate includes a core substrate and an electronic component, which is arranged in a cavity formed in the core substrate. When manufacturing the wiring substrate, the core substrate is formed including a cavity that is larger than the electronic component. A tape is temporarily applied to the lower surface of the core substrate to close the cavity. The electronic component is adhered to the tape that is exposed in the cavity. The cavity is filled with an insulation resin, which forms an insulation layer on the upper surface of the core substrate where the tape is not applied. When the insulation resin fixes the electronic component to the core substrate, the tape is removed from the core substrate. A further insulation layer is formed on the surface from which the tape was removed. A predetermined number of insulation layers and a predetermined number of wiring layers are formed on each insulation layer.